Emerald-SiC Engineered Substrate
Emerald-SiC is a P-grade/D-grade SiC engineered substrate achieved through our innovative advanced wafer bonding and layer transfer technologies. It effectively reduces the cost of existing SiC substrate materials while improving device performance to a certain extent. The promotion and widespread adoption of Emerald-SiC will further expand the application scenarios of SiC devices, supporting the high-quality development of the SiC industry.
Emerald-SiC Engineered Substrate (6 inch)

  • Items
  • Specification
  • Diameter
  • 150±0.2 mm
  • Polytype
  • 4H
  • Dopant
  • N-type / Nitrogen
  • Resistivity
  • 0.015-0.025 ohm·cm
  • Face Orientation
  • 4.0° off-axis towards <11-20>±0.5°
  • Transfer Layer Thickness
  • ≥0.5 μm
  • Void (Size: ≥5 mm)

    Void (Size: 1 ~ 5 mm)

    Void (Size: 0.5~1 mm)

  • 0 ea/wafer

    ≤3 ea/wafer

    ≤5 ea/wafer

  • Front (Si-face) roughness
  • Ra≤0.2 nm (5 μm*5 μm)
  • Edge Chip, Scratch, Crack (visual inspection)
  • None
  • TTV
  • ≤5 μm
  • Warp
  • ≤50 μm
  • Thickness
  • 350±25 μm
Emerald-SiC Engineered Substrate (8 inch)

  • Items
  • Specification
  • Diameter
  • 200±0.2 mm
  • Polytype
  • 4H
  • Dopant
  • N-type / Nitrogen
  • Resistivity
  • 0.015-0.025 ohm·cm
  • Face Orientation
  • 4.0° off-axis towards <11-20>±0.5°
  • Transfer Layer Thickness
  • ≥0.5 μm
  • Void (Size: ≥5 mm)

    Void (Size: 1-5 mm)

    Void (Size: 0.5-1 mm)

  • 0 ea/wafer

    ≤6 ea/wafer

    ≤10 ea/wafer

  • Front (Si-face) roughness
  • Ra≤0.2 nm (5 μm*5 μm)
  • Edge Chip, Scratch, Crack (visual inspection)
  • None
  • TTV
  • ≤7 μm
  • Warp
  • ≤50 μm
  • Thickness
  • 500±25 μm
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